In recent years, high-frequency switch ICs for use in communications receiver circuits and transmitter circuits have undergone rapid increases in performance and functionality. Through the adoption of FETs using SOI substrates, high-frequency response performance has improved, and a large number of high-frequency switch ICs that allow a power circuit and a control circuit to be mounted on the same chip have been developed to meet the requirements of downsizing.
In a high-frequency switch IC, when input power is increased, and the voltage amplitude due to an input signal exceeds the breakdown voltage of an FET, current flows out to an FET that should be in an off state, thereby disturbing the input waveform. As a result, in the high-frequency switch circuit, harmonic distortion increases.
A technique for reducing harmonic distortion includes body bias control technology by which threshold voltage is controlled by substrate potential control. However, when the total gate width (Wg) of an FET is increased to reduce the on-resistance of a high-frequency switch IC, it is difficult to uniformly control a large body region by performing substrate potential control. As a result, partial currents concentrate and flow out, increasing the device temperature. This is a problem in that it causes the breakdown voltage of the entire high-frequency switch IC to be reduced.